Interleaved High Voltage Gain DC / DC Converter with Diode-Capacitor Multiplier and Coupled Inductors

A novel interleaved high voltage gain converter with diode-capacitor multiplier and coupled inductors is proposed to satisfy the high voltage gain, high power, and high efficiency requirements. In the proposed converter, the input-parallel configuration is used to share the input current and to reduce the conduction losses, while the diode-capacitor multiplier and coupled-inductor based voltage multiplier are employed to obtain the high voltage gain without operating at extreme duty cycle. The voltage stress of the power switches us greatly lower than the output voltage such that the low-voltage-rated MOSFETs can be employed to reduce the conduction losses and cost. Meanwhile, the diode reverse problem is alleviated by the leakage inductance of the coupled inductors. All these feathers make the proposed converter suitable for the high voltage gain and high power applications. Finally, a 500 W prototype with 36-400 V conversion is built and tested to demonstrate the effectiveness of the proposed converter.


Introduction
Due to the global warming problem and the fast exhaustion of the fossil fuel, much effort has been made to explore the renewable energy sources, such as the photovoltaic (PV), the fuel cells and the wind power (1)(2) .The renewable energy grid-connected system with PV and fuel cells calls for high voltage-gain and high-efficiency dc-dc converters because the low voltage generated by the PV and fuel cells should be boosted to a high voltage for the grid-connected system.If the line voltage is 220 Vac, a 380-400 V dc bus voltage is required for the grid-connected inverter.However, the output voltages of PV and fuel cells are generally ranged from 24 to 40 V (3) due to the safety and reliability considerations in the house-hold applications.Thus, a dc-dc converter with a high voltage gain is needed to boost the outputs of PV and fuel cells.
In general, a conventional boost converter can be used to provide a high voltage gain with an extreme duty cycle.However, it results in large current ripple, high switching losses, severe output diode reverse-recovery problem, and electromagnetic interference (EMI) problem (4) .Moreover, the voltage stresses of the power switch and the output diode are equal to the output voltage, the high-voltage-rated MOSEFTs with large conduction resistor are necessary in the high output-voltage conversion system, which leads to large conduction losses and switching losses.These problems are the main limitations for the conventional boost converter.Commonly, the interleaved structure is applied in high current applications to minimize the current ripple, reduce the size of the filter components and increase the power level due to its advantages of current ripple cancellation and current-sharing performance.
In order to obtain high step-up voltage gain and high efficiency, many converter topologies have been proposed in the literature (5)(6)(7)(8)(9)(10)(11)(12)(13) .Among these achievements, they can be classified into the following categories: high step-up converters with coupled inductor (5)(6)(7) , high step-up converters with switched capacitor (8)(9) , high step-up converters with voltage lift technique (10)(11) , and high step-up converters with soft-switching technique (12)(13) .The coupled inductor serves as a transformer that is used to enlarge the voltage gain by a proper turns ratio design.The switched capacitor can be regarded as another voltage source to extend the high voltage gain conversion.As a result, the high voltage gain is achieved without operating at extreme duty cycle to alleviate the aforementioned limitation.DOI: 10.12792/iciae2016.088Fig. 2. Equivalent Circuit of the proposed converter.

Topology and Operational Principle
The proposed interleaved high voltage gain converter is shown in Fig. 1.The voltage multiplier module is composed of the second windings of the coupled inductors, two diodes and two capacitors, which is stacked on the output of the conventional interleaved boost converter.Furthermore, the diode-capacitor multiplier is inserted between the switches and output diode to extend the output voltage.There are two coupled inductors in the proposed converter.Each coupled inductor is modeled as a combination of an ideal transformer with a turns ratio n , a magnetizing inductance and leakage inductance.The coupling references of the inductors are denoted by the marks "  " and "  " as given in Fig. 1.
The equivalent circuit of the proposed converter is demonstrated in Fig. 2, where

Converter Performance Analysis
To simplify the circuit performance analysis of the proposed converter in CCM, some assumptions are made as follows.
1.All of the power devices are ideal, i.e., the on-state resistance R ds(on) is neglected, and the forward voltage drop of the diode is ignored.2. The capacitors are sufficiently large, such that the voltages across them can be considered as constant in one switching period.3. The converter is under steady state and is operating in CCM with duty cycle being greater than 0.5 for high voltage gain voltage purpose.
4. Two coupled inductors are considered to be identical, , and the coupling-coefficient Table 1.Magnetizing inductor voltages in the stages.
Stages Voltage

Voltage Gain Expression
Since the time durations of stages 3 and 6 are transition period and significantly short, only stages 1, 2, 4, and 5 are considered for the steady-state analysis.The magnetizing inductor voltages L can be expressed respectively as where T is the switching period.Substituting the parameters in Table 1 into Eq.( 1) and Eq. ( 2), the voltage on the At stage 2, we have Substituting Eq. (3) and Eq. ( 4) into Eq.( 5) and Eq. ( 6) the voltage on the capacitors 1 C and 3 C can be expressed as Similarly at stage 5, the voltage Finally, the output voltage can be obtained by  .It can be seen that the coupling coefficient k has only minor influence on the voltage gain.When k equals 1, the ideal voltage gain is obtained by Equation (11) shows that the proposed converter achieves a high voltage gain by using the diode-capacitor multiplier and increasing the turns ratio of the coupled inductor.The ideal voltage gain versus the duty cycle of under various turns ratio of the coupled inductor is shown in Fig. 6.The ideal voltage gain versus duty cycle of the proposed converter, and the converter proposed in (14)(15) with 1  k and 1  n are depicted in Fig. 7.It can be seen that the proposed converter has higher transfer gain in comparison with other converters.

Voltage stresses of switching devices
Based on the description of the operational principle， the voltage stresses on the power switches The switch voltage stress is much lower than the output voltage.As the turns ratio increases, the switch voltage stress decreases.As a result, the low-voltage-rated MOSFETs with low R ds(on) can be employed in high voltage applications.The conduction losses and cost are reduced compared with the conventional boost converter.

Limitation of the turns ratio
From the steady-state analysis, it is assumed that the duty cycle is greater than 0.5.Based on the voltage gain expression in Eq. ( 11), it can be concluded that the limitation of the turns ratio can be expressed as

Performance Comparison
The performance comparison among the conventional interleaved boost converter, the converter published in (16) and the proposed converter is shown in Table 2.It can be seen that the voltage gain of the proposed converter is higher than the other converters.Clearly, the proposed converter is more suitable for high voltage gain and high output voltage applications.In the comparison of the switch voltage stress among them, the switch voltage stress of the proposed converter is much lower than the other converters.Consequently, the low-voltage-rate MOSFETs with low R ds(on) can be employed to reduce the conduction losses and cost compared with the other converters.

Experimental Results
In order to verify the effectiveness of the proposed converter, a 500 W prototype converter with V 36 is built and tested.The parameters of the proposed converter are given as follows:       V are about 240 V, 80 V and 80 V, respectively.The results coincide with the expressions in Eqs. ( 7)- (9).The efficiency at full load is appropriately 91%.The efficiency is higher than that of the conventional interleaved boost converter.

Conclusions
This paper presents an interleaved high voltage gain DC-DC converter with the diode-capacitor multiplier and coupled inductors.The voltage gain conversion ratio is enlarged and the extreme duty cycle can be avoided in the high voltage gain applications.The voltage stresses of the power switches are much lower than the output voltage.As a result, lower-voltage-rate power devices can be adopted to reduce the conduction losses.The input ripple current is decreased due to the interleaved operations.The diode-capacitor multiplier is employed to recycle the leakage energy, and absorb the turn-off voltage spikes.The output diode reverse-recovery problem is alleviated by the leakage inductances of the coupled inductors.This paper also describes the operational principle and the converter performance analysis in detail.Finally, a 500 W prototype is implemented and the experimental results are given to validate the performance of the proposed converter.

1 D . The voltage stress on 2 SC
is clamped by a C which is equal to the output voltage of the conventional boost converter.release energy to the output side.The capacitor b

Fig. 7 .
Fig. 7. Voltage gain curve comparison.duty cycle with different coupling coefficients of the coupled inductor when the turns ratio 1  n .It can be seen that the coupling coefficient k has only minor influence on the voltage gain.When k equals 1, the ideal voltage gain is obtained by

Fig. 8 .
The extreme duty cycle existed in the conventional interleaved boost converter is avoided because the voltage gain of the proposed converter is extended.The switch voltage stress is about 80 V with the turns ratio n=1.That is only one-fifth of the output voltage.

Fig. 9
Fig.9shows the input current

Fig. 10
Fig. 10 shows the output voltage and voltages on the output capacitors 1 C , 2 C and 3 C . o and

Fig. 11
Fig. 11 shows the measured efficiency.The maximum efficiency is 97.2% at W. 0 5 1  o PThe efficiency at full Fig. 8. Measured waveforms of Fig. 9. Measured waveforms of Fig. 10.Measured waveforms of